Imec demonstrates low power beamforming transceiver chipset for 60GHz multi-Gbit wireless communication.
New advancement enables the development of low-power, low-cost, high-data rate solutions for true mobile devices

San Francisco (USA) – February 19, 2013 – Imec, in collaboration with Panasonic Corporation (Japan), has presented at the IEEE International Solid-State Circuits Conference (ISSCC2013) a 60GHz radio transceiver chipset with low power consumption, that delivers high data rates over short distances. Imec drastically boosted the link budget of the system by introducing beamforming into the radio architecture. This multi-Gbit 60GHz chipset paves the way toward small size, low-power, low-cost, high-data rate solutions for battery-operated consumer devices, such as smart phones and tablets.

“Exchange of gigabytes of data between mobile devices requires a viable 60GHz technology that balances cost, size and power consumption,” said Liesbet Van der Perre, program director of green radios at imec, “Imec’s prototype transceiver chipset enables multi-gigabit wireless connectivity for ‘true mobile’ devices thanks to its very low power consumption. More demanding applications such as high-definition video streaming and gaming with low latency, proximity computing and wireless docking can also be built on our technology.”

The prototype chipset consists of a receiver and a transmitter chip, and these are based on a direct conversion architecture combined with an on-chip phased-array architecture. This makes it suited for implementation in 40nm low-power digital CMOS technology targeting low-cost, mass market production. The receiver and transmitter chips are implemented for 4 antenna paths, but they are easily extendible to more antenna paths thanks to the beamforming at analog baseband, rather than at RF. The chip size is kept low through the use of lumped components even at 60GHz, and very compact mm-wave CMOS layout techniques. The transmitter chip consumes 584mW and the receiver chip 400mW at 1.1V power supply. The chipset is integrated with a 4 antenna array in a compact module and demonstrated in a wireless link. With QPSK modulation, a data rate of 2.31Gbps is obtained, and with QAM16 modulation, a data rate of 4.62Gbps is achieved. No bit errors were found when transmitting packets of 32,768 symbols over a distance of 3.6m with QPSK modulation and 0.7m with QAM16 modulation. Thanks to the beamforming a 3dB scan angle range around 120º is achieved with 11dBi antenna gain.

The imec receiver and transmitter chips are designed for the IEEE802.11ad standard. The receiver and transmitter chipset has been tested with a IEEE 802.11ad PHY/MAC baseband chip developed by Panasonic, demonstrating the complete system for IEEE 802.11 applications. The beamforming functionality is also verified in these system tests.

We invite other companies to join imec’s 60GHz R&D program as research partner or they can have access to the technology for further development through licensing programs.

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Imec Presents Low-Power Chip for Intra-Cardiac Ventricular Fibrillation Detection
20/2/2013
San Francisco, USA – February 19, 2013 – Imec demonstrated a low-power (20µW), intra-cardiac signal processing chip for the detection of ventricular fibrillation at this week’s International Solid State Circuits Conference (ISSCC 2013) in San Francisco with Olympus. An important step toward next-generation Cardiac Resynchronization Therapy solutions, the new chip delivers innovative signal processing functionalities and consumes only 20µW when all channels are active, enabling the miniaturization of implantable devices.

Robust and accurate Heart Rate (HR) monitoring of the right and left ventricles and right atrium is essential for implantable devices for Cardiac Resynchronization Therapy. And accurate motion sensor and thoracic impedance measurements to analyze intra-thoracic fluid are critical for improving clinical research and analysis of the intra-cardiac rhythm. Moreover, extreme low-power consumption is required to further reduce the size of cardiac implants and improve the patient’s quality of life.
Imec’s low-power integrated circuit features three power-efficient, intra-cardiac signal readout channels (or in short: ECG channels). Each of the three ECG channels is equipped with a precision ECG signal readout circuit with very low-power consumption and an analog signal processor to extract the features of the ECG signal for detection of ventricular fibrillation. The feature extractor achieves only 2ms latency to facilitate responsive Cardiac Resynchronization Therapy.

Additionally, the chip includes unique features that improve the functionality of Cardiac Resynchronization Therapy devices. First, the low-power accelerometer readout channel enables rate adaptive pacing. Secondly, to handle intra-thoracic fluid analysis, the chip includes a 16-level digital sinusoidal current generator and provides 82db wide dynamic range bio-impedance measurement, in the range of 0.1Ω－4.4kΩ with 35mΩ resolution, and achieves best-in-class accuracy (>97%).